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FIWARE.Feature.MiWi.DisplayAsAService.HardwareAcceleratedEncoding - FIWARE Forge Wiki

FIWARE.Feature.MiWi.DisplayAsAService.HardwareAcceleratedEncoding

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Name HardwareAcceleratedEncoding Chapter MiWi
Goal System latency should be reduced by a hardware accelerated coding pipeline
Description The application should employ a hardware accelerated coding pipeline to reduce latency introduced by the coding step. Hardware acceleration ensures to process the video stream in real time to have it delivered flawlessly to the virtual displays. The hardware acceleration will be based on the Intel QuickSync technology.
Rationale Video coding can be a computational costy process. In a real-time streaming application, latency must still be kept low e.g. by employing hardware acceleration.
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