We use proprietary and third party's cookies to improve your experience and our services, identifying your Internet Browsing preferences on our website; develop analytic activities and display advertising based on your preferences. If you keep browsing, you accept its use. You can get more information on our Cookie Policy
Cookies Policy
FIWARE.Feature.MiWi.DisplayAsAService.HardwareAcceleratedEncoding - FIWARE Forge Wiki


From FIWARE Forge Wiki

Jump to: navigation, search
Name HardwareAcceleratedEncoding Chapter MiWi
Goal System latency should be reduced by a hardware accelerated coding pipeline
Description The application should employ a hardware accelerated coding pipeline to reduce latency introduced by the coding step. Hardware acceleration ensures to process the video stream in real time to have it delivered flawlessly to the virtual displays. The hardware acceleration will be based on the Intel QuickSync technology.
Rationale Video coding can be a computational costy process. In a real-time streaming application, latency must still be kept low e.g. by employing hardware acceleration.
Personal tools
Create a book